Chapter 1: What’s New for Release 13.1
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The Triple-Rate SDI receiver and transmitter are provided as unencrypted
source code in both Verilog and VHDL, allowing you to fully customize these
interfaces as required by your specific applications.
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-
-
Provides designers with an LTE Physical Uplink Control Channel Receiver
block for the 3GPP TS 36.211 v9.0.0 Physical Channels and Modulation
(Release 9) specification.
Support for channel estimation, demodulation and decoding.
Additional IP supporting AXI4 Interfaces
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?
?
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The latest versions of CORE Generator IP have been updated with Production AXI4
interface support. For more detailed support information see
In general, the AXI4 interface will be supported by the latest version of an IP, for
Virtex?-7, Kintex?-7, Virtex?-6 and Spartan?-6 device families. Older "Production"
versions of IP will continue to support the legacy interface for the respective core on
Virtex?-6, Spartan?-6, Virtex?-5, Virtex?-4 and Spartan?-3 device families only.
For general information on Xilinx AXI4 support see
A comprehensive listing of cores that have been updated in this release can be viewed
CORE Generator Enhancements
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Introducing support for IP-XACT based IP repositories for Xilinx and Alliance
Program Member IP. (Requires no changes to existing CORE Generator, PlanAhead
and Project Navigator user flows.)
Addition of “Manage IP” pull-down menu to provide repository and IP management
features.
Display of AXI4 support by each IP in the IP catalog has been expanded to display the
various AXI4 interfaces in separate sortable columns: AXI4, AXI4-Stream and AXI4-
Lite
Individual ports in IP symbols can now be grouped into AXI4 channels for simplified
symbol views.
PlanAhead IP Design Flow Enhancements
?
?
?
Introducing support for IP-XACT based IP repositories for Xilinx and Alliance
Program Member IP (Requires no changes to the existing PlanAhead IP flow).
Display of AXI4 support by each IP in the IP catalog has been expanded to display the
various AXI4 interfaces in separate sortable columns: AXI4, AXI4-Stream, and AXI4-
Lite.
Support added for Automatic IP Upgrade flow.
20
ISE Design Suite 13: Release Notes Guide
UG631 (v 13.1)
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